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A quadrature charge-domain filter (QCDF) is proposed for downconversion and filters in RF receivers. The QCDF is designed with a chosen IF of 268 MHz, which is assumed a downconverted signal from 802.11 g RF signals by a subsampling or subharmonic mixer. Through a sampling rate of 1072 MS/s, the QCDF possessed 53-dB stopband attenuation, 32.51-dB alias-band attenuation, and 44-MHz bandwidth. For quadrature performance, this QCDF provided -27.67-dB error vector magnitude, using a 64 quadratic amplitude modulation signal with a bit rate of 54 Mb/s. This chip totally consumed 7.7 mA from a 1.2-V power supply and occupied 0.08 mm2 in 90-nm CMOS logical process.