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Measuring strain in long-channel MOSFETs on silicon-on-insulator (SOI) and strained-SOI platforms is demonstrated using ultraviolet (UV) Raman spectroscopy. Removal of the Raman inactive strain-inducing metallization layers is avoided by etching trenches under transistors without mask alignment in order to expose the channel region. The technique is shown to be repeatable and does not alter the initial strain state in the channel. The applicability of this technique to short-channel transistors is also discussed.