Referenced Items are not available for this document.
This paper describes the concept, architecture, development and demonstration of a real time, maximum likelihood Alamouti decoder for a wireless 4-transmit 4-receiver multiple input and multiple output (MIMO) Smart Antenna Software Radio Test System (SASRATS) platform. It is implemented on a Xilinx Virtex 2 Pro Field Programmable Gate Array (FPGA).Hardware, firmware, use of the Xilinx Core Generator Intellectual Property modules and experimental verification of the decoder are discussed.
Published in:
Electronic Design, Test and Application, 2010. DELTA '10. Fifth IEEE International Symposium on
Date of Conference: 13-15 Jan. 2010
- Page(s):
- 139 - 143
- E-ISBN :
- 978-1-4244-6026-7
- Print ISBN:
- 978-0-7695-3978-2
- INSPEC Accession Number:
- 11207081
- Conference Location :
- Ho Chi Minh City
- Digital Object Identifier :
- 10.1109/DELTA.2010.9
- Product Type:
- Conference Publications
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
