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A 0.2 μ m emitter bipolar technology with improved LOCOS isolation for low cost and high performance mixed analog/digital applications is presented. The technology features high speed transistors (Tpdmin=21ps, fTmax=30GHz), high Ã and high emitter-base breakdown voltage transistors (β=700, BVebo=10V), low power IIL (Tpd*Pd=9fJ/gate), and triple layers of metal. Total process steps are reduced to 80% by means of improved LOCOSprocess instead of deep trench isolation, which is 22% less than our 0.8 μ m BiCMOS process steps. An HDD R/W Amp. IC, which needs BVebo of more than 4V, was realized using high β and high BVebo transistor. A 2.5GHz 2R IC was also realized, and the high-speed transistor performance was confirmed.
Date of Conference: 9-11 Sept. 1996