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A Comparison of Hot-Hole Induced Degradation in Thin-Film Transistors using Thermally Recrystallised and LPCVD Deposited Polycrystalline Silicon as Active Layer

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6 Author(s)
Fortunato, G. ; IESS-CNR, Via Cineto Romano 42, 00156 Roma, ITALY. ; Pecora, A. ; Tallarida, G. ; Reita, C.
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In this work we have studied and compared the effects produced by prolonged application of bias-stresses with high source-drain voltage and negative gate voltages in two types of polysilicon thin-film transistors. Two main effects induced by bias-stressing have been observed: off-current reduction and transconductance degradation. The latter effect appears to be strongly related to gate leakage current which, in turns, is depending upon interface morphology.

Published in:

Solid State Device Research Conference, 1994. ESSDERC '94. 24th European

Date of Conference:

11-15 Sept. 1994