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Pulsed Drain Current : A Highly Sensitive Technique for Interface Characterization in VLSI MOSFET's

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1 Author(s)
Haddara, H. ; Electron. & Commun. Eng. Dept., Ain-Shams Univ., Cairo, Egypt

This paper presents a new highly sensitive technique for interface characterization in VLSI MOSFET's. The technique appears to be very promising for future generations of devices as its sensitivity increases with decreasing device dimensions. Our results show that it can detect trap densities as low as a few 109 eV-1 cm-2. Moreover, this sensitivity can be further enhanced by operating at liquid nitrogen temperature.

Published in:

Solid State Device Research Conference, 1993. ESSDERC '93. 23rd European

Date of Conference:

13-16 Sept. 1993