Skip to Main Content
A quantitative analysis of the effects causing the maximum cutoff frequency reduction as horizontal device dimensions are downscaled is carried out. Simple analytical expressions describing the geometry dependence of the maximum cutoff frequency fT and forward transit time are derived, and verified with numerical simulations. These expressions suggest a simple method to extract the values of the maximum cutoff frequency of the internal and peripheral transistors. Moreover, the influence of significant technological parameters on maximum cutoff frequency, forward transit time and propagation delay is investigated.