Referenced Items are not available for this document.
A fully integrated switched-capacitor DC-DC converter with 32-phase interleaving is implemented in 0.374 mm2 of a 32 nm SOI process. The converter can be reconfigured into three topologies to support 0.5 to 1.2 V output from a 2 V input supply, and achieves a maximum efficiency of 77% at an output power density of 0.55 W/mm2.
Published in:
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Date of Conference: 7-11 Feb. 2010
- Page(s):
- 210 - 211
- ISSN :
- 0193-6530
- Print ISBN:
- 978-1-4244-6033-5
- INSPEC Accession Number:
- 11204882
- Conference Location :
- San Francisco, CA
- Digital Object Identifier :
- 10.1109/ISSCC.2010.5433981
- Product Type:
- Conference Publications
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