A pseudo-multiple sampling technique for a low-noise CIS is implemented using a conventional column-parallel single-slope ADC structure with no additional circuitry. It is applied to a 1/3.2-inch 8Mpixel CIS. Measurement results show the technique effectively reduces dark temporal noise from 1.6e- to 1.2e- in 10 b ADC mode, and from 1.8e- to 1.1e- in 12b ADC mode.
Published in:
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Date of Conference: 7-11 Feb. 2010