Skip to Main Content
A 90 nm 4 Mb embedded phase-change memory (PCM) is presented, demonstrating the feasibility of PCM integration with 3 masks overhead in a 6-ML standard CMOS process. Using a low-voltage NMOS transistor as a cell selector leads to a 0.29 ??m2 cell size. A 1.2 V low-voltage read operation achieves a 12 ns access time. The 3 mm2 macro features a random write throughput of 1 MB/s and a mode to increase write throughput to 4 MB/s.