Referenced Items are not available for this document.
A CMOS frequency multiplier is based on a Pierce oscillator injection-locked by a push-push pair. Compared to traditional stand-alone push-push multipliers driving a selective load, this solution provides a differential output and a larger voltage swing. When driven by a half-frequency VCO, prototypes in 65 nm CMOS demonstrate a 13.1% tuning range at 115 GHz with a phase noise of -107 dBc/Hz @ 10 MHz offset for a total power dissipation of 12 mW.
Published in:
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Date of Conference: 7-11 Feb. 2010
- Page(s):
- 422 - 423
- ISSN :
- 0193-6530
- Print ISBN:
- 978-1-4244-6033-5
- INSPEC Accession Number:
- 11205003
- Conference Location :
- San Francisco, CA
- Digital Object Identifier :
- 10.1109/ISSCC.2010.5433869
- Product Type:
- Conference Publications
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