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A 512kb 8T SRAM macro operating down to 0.57V with an AC-coupled sense amplifier and embedded data-retention-voltage sensor in 45nm SOI CMOS

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4 Author(s)
Qazi, M. ; Massachusetts Inst. of Technol., Cambridge, MA, USA ; Stawiasz, K. ; Chang, L. ; Chandrakasan, A.

An 8T SRAM fabricated in 45 nm SOI CMOS exhibits voltage scalable operation from 1.2 V down to 0.57 V with access times from 400 ps to 3.4 ns. Timing variation and the challenge of low-voltage operation are addressed with an AC-coupled sense amplifier. An area efficient data path is achieved with a regenerative global-bitline scheme. Finally, a data-retention-voltage sensor is developed to predict the mismatch-limited minimum-standby voltage without corrupting the content of the memory.

Published in:

Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International

Date of Conference:

7-11 Feb. 2010

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