By Topic

Petri nets and asynchronous circuit design

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Yakovlev, A. ; Newcastle upon Tyne Univ., UK ; Semenov, A. ; Koelmans, A.M. ; Kinniment, D.J.

Can a logic designer build a complex yet efficient asynchronous system completely or almost completely using formal methods and design tools? Is it possible to take a behavioural specification of the system and convert it into logic? What tools are needed and what tools are already available for this purpose? This presentation attempts to answer these and related questions by reviewing recent progress in development of methods and software tools based on Petri nets. Petri nets provide a rare combination of features that are essential in asynchronous circuit design: (i) a simple and easy to understand and manipulate graphical capture; (ii) modelling power that can be adjusted to various types of asynchronous behaviour at different levels of abstraction; (iii) formal operational semantics and verification of various correctness properties of both safety and progress types; (iv) possibility of synthesis of a circuit from its net model

Published in:

Design and Test of Asynchronous Systems, IEE Colloquium on

Date of Conference:

28 Feb 1996