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Technique for high speed asynchronous pipeline control

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3 Author(s)
Appleton, S.S. ; Dept. of Electr. & Electron. Eng., Adelaide Univ., SA, Australia ; Morton, S.V. ; Liebelt, M.J.

The authors explore the potential for enhanced performance in asynchronous pipeline control, by eliminating unneccessary signalling in bounded-delay asynchronous systems. An improvement of 15 and 36% in cycle time over optimal two and four phase asynchronous dynamic logic implementations, respectively, is demonstrated

Published in:

Electronics Letters  (Volume:32 ,  Issue: 21 )