Carrier profile designing to suppress systematic Vth variation related with device layout by controlling STI-enhanced dopant diffusions correlated with point defects

We directly measured that anisotropic dopant diffusion into the shallow trench isolation (STI) sink was the predominant factor to cause dependence of the threshold voltage (V_th) on the active width along the channel direction (LOD) for the nMOSFETs. We evaluated by Raman spectroscopy and 3-D stress simulation effects of the STI-induced stress variation on the V_th. Moreover, we directly measured that dopant diffusions coupled with point defect, as transient enhanced diffusion, resulted in the carrier profile depending on the LOD. In particular, it was found that the excess point defect in the deep source/drain enhanced the random extension edge roughness and increased intrinsic V_th fluctuation in the narrow-LOD nMOSFET.