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Bilayer metal oxide gate insulators for scaled Ge-channel metal-oxide-semiconductor devices

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4 Author(s)
Swaminathan, Shankar ; Department of Materials Science and Engineering, Stanford University, Stanford, California 94305, USA ; Shandalov, Michael ; Oshima, Yasuhiro ; McIntyre, Paul C.

Your organization might have access to this article on the publisher's site. To check, click on this link:http://dx.doi.org/+10.1063/1.3313946 

We investigate the electrical properties of germanium-channel metal-oxide-semiconductor capacitors with an amorphous atomic-layer-deposited (ALD)-Al2O3 interlayer (IL) and higher-k ALD-TiO2 gate dielectric. An ALD-Al2O3 IL of ∼1 nm thickness reduces the gate leakage current density at the otherwise low band-offset TiO2/Ge interface by six orders of magnitude at flatband. Devices with the thinnest Al2O3 IL exhibited a low capacitance equivalent thickness of 1.2 nm. The hysteresis of the capacitance-voltage curves was ≪10 mV for TiO2/Al2O3/Ge capacitors with different Al2O3 thicknesses. We obtained a relatively low minimum density of interface states, Dit ∼3×1011 cm-2eV-1, suggesting the potential of Al2O3 ILs for higher-k/Ge interface passivation.

Published in:

Applied Physics Letters  (Volume:96 ,  Issue: 8 )

Date of Publication:

Feb 2010

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