By Topic

An analytical dynamic scaling of supply voltage and body bias exploiting memory stall time variation

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Jungsoo Kim ; Dept. of EECS, KAIST, Daejeon, South Korea ; Younghoon Lee ; Sungjoo Yoo ; Chong-Min Kyung

Success of workload prediction, which is critical in achieving low energy consumption via dynamic voltage and frequency scaling (DVFS), depends on the accuracy of modeling the major sources of workload variation. Among them, memory stall time, whose variation is significant especially in case of memory-bound applications, has been mostly neglected or handled in too simplistic assumptions in previous works. In this paper, we present an analytical DVFS method which takes into account variations in both computation and memory stall cycles. The proposed method reduces leakage power consumption as well as switching power consumption through combined Vdd/Vbb scaling. Experimental results on MPEG4 and H.264 decoder have shown that, compared to previous methods and, our method achieves up to additional 30.0% and 15.8% energy reductions, respectively.

Published in:

Design Automation Conference (ASP-DAC), 2010 15th Asia and South Pacific

Date of Conference:

18-21 Jan. 2010