An incremental poly etching method can improve the poly pimple defect-induced device mismatch on the static noise margin (SNM) of 65-nm-node low-power 6T-SRAM. The improvement on circuit level is examined by the yield of scan chain and memory built-in self-test (MBIST), which is known to correlate well to process-induced defects.
Published in:
Electron Devices, IEEE Transactions on
(Volume:57
,
Issue:
4
)
Date of Publication: April 2010