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Hardware oriented algorithm analysis and modification for high definition AVS video encoder VLSI implementation Digest of technical papers

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4 Author(s)

In AVS video coding standard, some algorithms consume huge computation with relatively little coding performance contribution, and some algorithms create data dependencies that are harmful for efficient hardware pipeline. This paper focuses on hardware oriented algorithm analysis and modification. Motion estimation and mode decision algorithms are reviewed and modified to a hardware friendly configuration for high definition (HD) AVS video encoder VLSI implementation. The resulting performance penalties are simulated and analyzed.

Published in:

Consumer Electronics (ICCE), 2010 Digest of Technical Papers International Conference on

Date of Conference:

9-13 Jan. 2010