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Alignment and overlay characterization for 3D integration and advanced packaging

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2 Author(s)
H. W. van Zeijl ; Laboratory of Electronic Materials Devices and Components (ECTM), DIMES, DELFT University of Technology ; P. M. Sarro

The alignment and overlay performance of an ASML PAS5000 waferstepper is reviewed in relation to 3D integration and wafer level packaging (WLP) processes. The alignment system can be used to measure substrate distortions in wafer bonding and waferthinning processes and it can align with high accuracy through thick films. Moreover, it is demonstrated that in through silicon vias (TSV) processing the front- to backwafer overlay accuracy is limited by the etch process, not by the alignment system. An accurate fully functional alignment system can therefore be used to characterize and improve the overlay in 3D integration and WLP processes.

Published in:

Electronics Packaging Technology Conference, 2009. EPTC '09. 11th

Date of Conference:

9-11 Dec. 2009