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The aim of this paper is the investigation of the gate stack properties of submicron MOSFETs integrated in silicon on nothing technology and the identification of traps responsible for the current fluctuations by random telegraph signal (RTS) technique and low frequency technique. We show that the analysis of devices having random discrete fluctuations in the drain current, the analysis of the RTS noise parameters (amplitude, high and low state durations, activation energy, capture cross section) as a function of bias voltage and temperature, allows us to characterize the traps located in the interface (HfO2-SiO2)/Si. The conventional technique consists of statistical treatment of the RTS time-domain data. The study of RTS noise in submicron SON MOS transistors offers the opportunity of studying the trapping/detrapping behavior of a single interface trap. Furthermore, it has convincingly been shown that this discrete switching of the drain current between a high and a low state is the basic feature responsible for l/fγ flicker noise in MOSFETs transistors.