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Asynchronous sampling of 2D arrays using winner-takes-all arbitration

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4 Author(s)
Kalayjian, Zaven ; Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA ; Waskiewicz, J. ; Yochelson, D. ; Andreou, A.G.

We describe a novel scheme for asynchronous communication of information out of two dimensional processing arrays. Our architecture employs analog Winner Takes All (WTA) circuits instead of digital binary-tree arbiters found in other designs. A small system that incorporates an array of 9×12 pixels has been fabricated in a 2μ, double polysilicon, double metal process. Experimental results verify system functionality with a full-handshaking communication cycle of 3 μs. The WTA circuits have been independently tested and their operation verified down to 18 ns

Published in:

Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on  (Volume:3 )

Date of Conference:

12-15 May 1996