Asynchronous sampling of 2D arrays using winner-takes-all arbitration

We describe a novel scheme for asynchronous communication of information out of two dimensional processing arrays. Our architecture employs analog Winner Takes All (WTA) circuits instead of digital binary-tree arbiters found in other designs. A small system that incorporates an array of 9/spl times/12 pixels has been fabricated in a 2/spl mu/, double polysilicon, double metal process. Experimental results verify system functionality with a full-handshaking communication cycle of 3 /spl mu/s. The WTA circuits have been independently tested and their operation verified down to 18 ns.