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RF CMOS Parametric Downconverters

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4 Author(s)
Magierowski, S. ; Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada ; Bousquet, J. ; Zhixing Zhao ; Zourntos, T.

Parametric amplifiers are absent today from the majority of electronics applications. This is especially the case for parametric downconverters (PDCs). Coupled with the increasing emphasis on millimeter-wave applications and the cost of transistor scaling, the time may be right to reconsider these circuits. By employing coupled-mode theory, we arrive at a general description of PDCs. Consequently, a simple mixer is proposed that achieves gain at reduced pumping frequencies without resorting to sub-harmonics. The implications of this design for quadrature receiver systems are shown. Fundamental gain and noise limits are derived indicating the ability to operate at sub-5-dB noise figures (NFs) with very low-power requirements. Measurements on an accumulation-mode varactor in 130-nm CMOS technology indicate the necessary pumping and biasing regimes needed to approach these limits. Finally, a compact 30-GHz PDC design with 2-dB NF is discussed.

Published in:

Microwave Theory and Techniques, IEEE Transactions on  (Volume:58 ,  Issue: 3 )

Date of Publication:

March 2010

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