Scheduled System Maintenance:
On Monday, April 27th, IEEE Xplore will undergo scheduled maintenance from 1:00 PM - 3:00 PM ET (17:00 - 19:00 UTC). No interruption in service is anticipated.
By Topic

Class-AB output stage design for high-speed three-stage op-amps

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Cappuccino, G. ; Dept. of Electron., Comput. Sci. & Syst., Univ. of Calabria, Rende, Italy ; Amoroso, F.A. ; Pugliese, A.

A new design approach for three-stage operational amplifiers (op-amps) is proposed. It allows to actually implement a symmetrical push-pull class-AB amplifier output stage for well-established three-stage amplifiers using a feedforward transconductance stage. Compared with the conventional design practice, the proposed approach leads to a significant improvement of the symmetry between the positive and the negative op-amp step response, resulting in similar values of the positive/negative settling time. The new approach proves to be very useful in order to fully exploit the potentiality allowed by the op-amp in terms of speed performances. Design examples in a commercial 0.35-¿m CMOS prove the effectiveness of the proposed strategy.

Published in:

Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on

Date of Conference:

13-16 Dec. 2009