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An increasingly important concept when designing a system is Â¿energy awarenessÂ¿, which in contrast to traditional low power design for the worst case scenario, has the ability to scale the energy consumption when the operating conditions change, this ability provides the system with a global energy efficiency for a broad set of scenarios. Energy-aware designs combined with adaptive reconfigurable architectures and voltage scaling techniques focus on giving the system the flexibility that it needs, scaling down or up energy as the performance requirements change. A new adaptive energy-aware system design methodology is proposed for a 32-bit multiplier which supports variable bit precision (32-bit and 16-bit precision) and variable performance. The Configurable-Reuse of Point Solution method is described and evaluated. Results show up to 80% energy savings for 16-bit and up to 60% for 32-bit operations over a static 32-bit multiplier and up to 22 % in average compare with a twin precision multiplier. The evaluation is based on spectre simulations from multipliers implemented in a CMOS 65-nm technology.