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Sub-T bit/s large-capacity ATM MCM switching system design and modules with new low-power Gbit/s I/O circuits

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6 Author(s)
Kawamura, T. ; NTT Network Service Syst. Labs., Tokyo, Japan ; Yamanaka, N. ; Matsumura, T. ; Ichino, H.
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This paper presents a low-power large-capacity ATM switching system design and modules (LSI and MCM). An ATM crosspoint switch LSI for a high-speed large-capacity input and output buffering ATM switching system is developed through the use of 0.5 μm Si bipolar technology. It is confirmed that the LSI attains 25.6 Gbit/s throughput with 32-parallel-signal operation at 800 Mbit/s. The power dissipation of the LSI is only 64% of that of the ATM crosspoint switch LSI with ECL I/Os, by using new bipolar current-mode I/O circuits. The circuits have small voltage swing transmission and a 50 Ω impedance matching scheme at both terminals. They achieve 3.5 Gbit/s operation with half the power dissipation of standard ECL I/Os. The design of the proposed low-power switching system uses MCM technology with a copper-polyimide substrate, 150-μm pitch outer lead TAB and 98-highway flexible printed circuit cables for high-density packaging and high-speed operation. Using these technologies, a 160 Gbit/s ATM switching system with a power dissipation of about 1.3 kW can be achieved for future Broadband ISDN systems. This power is 65% of that of the reported system with ECL I/Os, and can be cooled by forced air with conventional fin-structures

Published in:

Electronic Manufacturing Technology Symposium, 1995, Proceedings of 1995 Japan International, 18th IEEE/CPMT International

Date of Conference:

4-6 Dec 1995