How to design an effective Serial Input Shift Register (SISR) for data compression process of Built-In Self-Test methodology

This paper investigates the impact of characteristic polynomial on an effective design of Serial Input Shift Register (SISR). How the use of a primitive characteristic polynomial cannot cope with the minimization of aliasing error probability. Further, the paper also, suggests about the selection of characteristic polynomial to minimize hardware, power dissipation and test data compression time. The study of this paper is based on simulation study using a suitably developed tool.