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The SCV library and its commercial counterparts have been effectively applied in electronic system level (ESL) for the production of test benches for system-level specifications in SystemC. Other works have enable the exploration, for fixed input data, of the different valid (fulfilling the SystemC simulation semantics) behaviours of the specification. The most efficient ones require the analysis of data and synchronization dependencies of the specification. However, in complex and heterogeneous specifications, there can be parts where such analysis becomes unfeasible. To overcome it, this paper enables and proposes the local application of simulation directed for exhaustive coverage of schedulings (or DEC simulation) for those parts. The paper shows how these features, not currently provided by any SystemC simulator, have been integrated and validated as an extension of the OSCI SystemC reference kernel.
Date of Conference: 22-24 Sept. 2009