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This paper presents a method reusing a coverification system testbench throughout the refinement process starting from a functional C model of a distributed system with the goal to optimize the HW/SW partitioning and distribution to multiple cores of a system. The partitioned system can then be used as an executable HW/SW specification in the ensuing design flow. The presented paradigm was validated using a distributed brake-by-wire design for the automotive industry.
Date of Conference: 22-24 Sept. 2009