Performance Evaluation of Cluster-Based Homogeneous Multiprocessor System-on-Chip Using FPGA Device

The cluster-based multiprocessor system-on-chip (MPSoC), which adopts the hybrid interconnection composed of both bus-based and NoC architecture, is a new infrastructure for MPSoC. For obtaining the fast exploration of multiple hardware (HW) and software (SW) implementation alternatives with accurate estimations of performance to tune the MPSoC architecture in an early stage of the design process, this paper use the FPGA device to prototype the cluster-based MPSoC with 17 processing cores. And, a suite of benchmarks, including several parallel applications with different characteristic of parallelism, workload and communication pattern, are designed and presented in this paper. The experiment results show that, the highest speed up ratio is up to 15.850.