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Scheduling Back-End Operations in Semiconductor Manufacturing

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4 Author(s)
Yumin Deng ; Industrial Engineering and Operations Research, The University of Texas, Austin ; Jonathan F. Bard ; G. Rodolfo Chacon ; John Stuber

The importance of back-end operations in semiconductor manufacturing has been growing steadily in the face of higher customer expectations and stronger competition in the industry. In order to achieve low cycle times, high throughput and high utilization while improving due-date performance, more effective tools are needed to support machine setup and lot dispatching decisions. This paper presents a new model and solution methodology aimed at maximizing the weighted throughput of lots undergoing assembly and test, while ensuring that critical lots are given priority. The problem is formulated as a mixed-integer program and solved with a reactive greedy randomized adaptive search procedure (GRASP). In phase I of the GRASP, machine-tooling combinations are tentatively fixed and lot assignments are made iteratively to arrive at a feasible solution. This process is repeated many times. In phase II, a novel neighborhood search is performed on a subset of good solutions found in phase I. Using a linear programming-Monte Carlo simulation-based algorithm, new machine-tooling combinations are identified within the neighborhood of the solutions carried over, and improvements are sought by optimizing the corresponding lot assignments. The methodology was tested on data provided by a major semiconductor manufacturer. The results show that GRASP achieves high quality solutions comparable to those obtained with CPLEX in often half the time.

Published in:

IEEE Transactions on Semiconductor Manufacturing  (Volume:23 ,  Issue: 2 )