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A CMOS RF receiver for digital radio broadcasting DRM and DAB applications is presented that contains an RF front-end, an analog baseband, a frequency synthesizer, and a controlling logic unit. In the RF front-end, the noise figure (NF) is minimized by a noise-canceling technology, and the IP3 is improved by using differential multiple gate transistors (DMGTR). The analog baseband consists of an image-rejection mixer, a 5th-order OTA-C bandpass filter (BPF), two IF VGAs, and a received signal strength indicator (RSSI). The frequency synthesizer is an integer-N PLL based on multi-modulus dividers (MMD), which achieves a wide frequency covering. The circuit is fabricated in a 0.18-Â¿m CMOS technology. The DSB-NF of the RF front-end is 3.1~6.1 dB while the IIP3 is -4.7~0.2 dB, and the gain dynamic range is >85 dB. The image-rejection radio (IRR) of the image-rejection mixer is >40 dB for DAB and >45 dB for DRM. The LO phase noise is -69.81 dBc/Hz@10 kHz and -108.30 dBc/Hz@1MHz. The chip area is 2.66 mm Ã 2.22 mm, while drawing a current of 52 mA from a 1.8 V voltage supply.