By Topic

VLSI design techniques and strategies for implementing adaptive equalizer

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Ab Rahman, A.A.-H. ; Fac. of Electr. Eng., Univ. Teknol. Malaysia, Skudai, Malaysia ; Kamisian, I. ; Sha'ameri, A.Z.

VLSI design of signal processing algorithm involves multiple selections and trade-off in order to achieve performance that is required for a particular application. In the case of realizing adaptive channel equalizer, digital circuit designers are confronted with three main design criteria that significantly affect the outcome of the circuit; filter structure and architecture, adaptive algorithm, and arithmetic components. This paper reviews some of the design techniques and strategies to achieve high performance adaptive equalizer based on optimal trade-off between the criteria. In addition to this, ASIC design of adaptive equalizer targeted to TSMC 0.25 ¿m process technology is also presented. Simulation results show that the designed VLSI adaptive equalizer can successfully equalize distorted signals with ISI, with core cell layout area and throughput of 0.562 mm2 and 223 Kb/s respectively, which is suitable for mobile communication applications.

Published in:

Microelectronics, 2008. ICM 2008. International Conference on

Date of Conference:

14-17 Dec. 2008