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Design of a High-Speed Transistor for the ASLT Current Switch

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2 Author(s)

The evolution of a high-speed current switch transistor design is described from initial design considerations through final optimization of horizontal geometry. It was found that a very narrow geometry was desirable, in order to produce the desired low base resistance (∼40 Ω). Other characteristics of this design include low capacitance, well-controlled emitter forward voltage, and high-frequency cutoff. Compatibility with the SLT form factor assures manufacturability. This transistor when used in ASLT circuits yields circuit delays of 1.8 nsec.

Note: The Institute of Electrical and Electronics Engineers, Incorporated is distributing this Article with permission of the International Business Machines Corporation (IBM) who is the exclusive owner. The recipient of this Article may not assign, sublicense, lease, rent or otherwise transfer, reproduce, prepare derivative works, publicly display or perform, or distribute the Article.  

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IBM Journal of Research and Development  (Volume:11 ,  Issue: 1 )