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This paper presents an evaluation of the relative merits of two schemes for performing concurrent error detection in group look-ahead adders. One of the schemes is a residue mod 3 check and the other is a parity prediction check. The Boolean statements that define the operation of group look-ahead adders, concurrent error detection and the Boolean difference serve as background for interpreting the results of the study. The Boolean difference is a tool for calculating the “coverage” of elements in a logical network by error-checking schemes. Some weaknesses in prior studies of coverage calculation are brought to light. Tables showing the number of circuit elements in the various portions of adder and error-checking circuits are given. It is shown that the residue mod 3 check adder is not economical unless the addition operands are already provided with the mod 3 check bits. Thus, a worthwhile comparison of the checking schemes should not proceed without considering the overall data flow checking strategy. In machine organizations with three or more data transfer checks, the parity-checked adder seems to offer a cost advantage.
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