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A Self-Isolation Scheme for Integrated Circuits

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1 Author(s)
Vora, M.B. ; IBM Components Division Laboratory, E. Fishkill (Hopewell Junction), New York 12533, USA

A self-isolation scheme is proposed for fabricating transistors in semiconductor integrated circuits. Such integrated circuits with double-diffused transistors require three diffusions and one epitaxial layer in the proposed process. Since no isolation or reach-through diffusions are involved, this technique could reduce the area of a memory or logic cell by 50% or more.

Note: The Institute of Electrical and Electronics Engineers, Incorporated is distributing this Article with permission of the International Business Machines Corporation (IBM) who is the exclusive owner. The recipient of this Article may not assign, sublicense, lease, rent or otherwise transfer, reproduce, prepare derivative works, publicly display or perform, or distribute the Article.  

Published in:

IBM Journal of Research and Development  (Volume:15 ,  Issue: 6 )