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Threshold Voltage Characteristics of Double-boron-implanted Enhancement-mode MOSFETs

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2 Author(s)
Wang, P.P. ; IBM System Communications Division Laboratory, Kingston, NY 12401, USA ; Spencer, O.S.

Threshold voltage characteristics are presented for a double boron-ion-implanted n-channel enhancement MOSFET device for high speed logic circuit applications. A 15-Ω-cm high resistivity p-type (100) substrate was used to achieve low junction capacitance and low threshold substrate sensitivity. A shallow boron implant was used to raise the threshold voltage, and a second, deeper, boron implant was used to increase the punch-through voltage between the source and the drain. This design is especially beneficial for short channel devices, while maintaining the low junction capacitance and low threshold substrate sensitivity of the high resistivity substrate. A one-dimensional analysis was performed to predict the effects of ion implantation dose and energy on the device characteristics, and a quasi two-dimensional analysis was used to account for the short channel effect. The calculated results agree well with the behavior of experimental devices fabricated in the laboratory.

Note: The Institute of Electrical and Electronics Engineers, Incorporated is distributing this Article with permission of the International Business Machines Corporation (IBM) who is the exclusive owner. The recipient of this Article may not assign, sublicense, lease, rent or otherwise transfer, reproduce, prepare derivative works, publicly display or perform, or distribute the Article.  

Published in:

IBM Journal of Research and Development  (Volume:19 ,  Issue: 6 )

Date of Publication:

Nov. 1975

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