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Stability of Lateral pnp Transistors During Accelerated Aging

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1 Author(s)
Gillespie, S.J. ; IBM General Technology Division laboratory, Essex Junction, Vermont 05452, USA

Lateral pnp devices stressed under accelerated temperature and voltage conditions show a degradation in the transistor breakdown voltage. These results and additional experiments that were conducted to better understand the mechanisms involved in the observed behavior are described. It was concluded that the degradation can be related to a negative surface charge in the base region of the transistor. This preliminary finding has design and process implications for potential improvement of bipolar device reliability in applications that call for high voltages and low epitaxial doping concentration.

Note: The Institute of Electrical and Electronics Engineers, Incorporated is distributing this Article with permission of the International Business Machines Corporation (IBM) who is the exclusive owner. The recipient of this Article may not assign, sublicense, lease, rent or otherwise transfer, reproduce, prepare derivative works, publicly display or perform, or distribute the Article.  

Published in:

IBM Journal of Research and Development  (Volume:23 ,  Issue: 6 )