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Damage introduced by ion implantation on the back side of the wafer is used to reduce the MOS transient (relaxation) and junction leakage; the technique is applied to dynamic memory cells. Conditions necessary to ensure efficient gettering by various species (B, Ar, Kr, and Xe) are established based on achieving a sufficient density of b = ½ 〈110〉 dislocations. When the implantation occurs through a screen oxide, dose levels of less than 3 × 1014 ions/cm2 for Ar were found to be suitable. Equivalent leakage reduction was obtained for all species. Specifically, B at 5 × 1015 ions/cm2 was as effective in reducing relaxation leakage as was 1 × 1015 ions/cm2 of Ar for the particular thermal history of the investigated process.
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