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Macro Generation Algorithms for LSI Custom Chip Design

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1 Author(s)
Bernard Vergnieres ; IBM Essonnes Component Development Laboratory, Corbeil-Essonnes, France 91102

Presented in this paper are macro generation algorithms which have been developed and implemented for the optimization of physical and electrical designs of LSI macro circuits. Any type of logical macro circuit for a custom chip design can be automatically generated and optimized through the use of the concepts and numerical techniques for algorithmic layout generation and electrical network design which are described. The application of this design method to programmable logic array macros, which allow the generation of very attractive designs, is also discussed and illustrates the efficiency and flexibility of the macro generation concept.

Note: The Institute of Electrical and Electronics Engineers, Incorporated is distributing this Article with permission of the International Business Machines Corporation (IBM) who is the exclusive owner. The recipient of this Article may not assign, sublicense, lease, rent or otherwise transfer, reproduce, prepare derivative works, publicly display or perform, or distribute the Article.  

Published in:

IBM Journal of Research and Development  (Volume:24 ,  Issue: 5 )