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A wire routing system (VIKING) has been developed for interconnection packages. It uses iterative-improvement methods that allow “illegalities” (such as wire crossings within a plane) at intermediate stages of the routing, eliminates some drawbacks of conventional sequential routers, and extends the range of penalty functions with respect to which a wiring configuration can be optimized. Efficient routing in directionally uncommitted planes is provided; specification of preferred-direction (x and y) planes is optional but not required. Significant reductions in required manual embedding effort, number of vias required, routed wire length, and the number of signal planes required to wire a package, have been found, compared with sequential routers that have been used. Improved automatic control of electrical crosstalk noise has also been provided. In addition to presenting VIKING methods and results, we discuss other issues relating to wiring methods and global optimization. Application of these methods to chip design is also discussed.
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