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Microtasking on IBM multiprocessors

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3 Author(s)
Paolo Carnevali ; IBM European Center for Scientific and Engineering Computing, Via Giorgione 159, 00147 Rome, Italy ; Piero Sguazzero ; Vittorio Zecca

The demand for very high computing performance has become increasingly common in many scientific and engineering environments. In addition to vector processing, parallel computing is now considered a useful way to enhance performance. However, parallel computing tends to be unpopular among users because, with presently available technology and software, it requires explicit programmer intervention to exploit architectural parallelism. This intervention can be minor in some cases, but it often requires a nonnegligible amount of program restructuring, or even a reformulation of some of the algorithms used. In addition, it makes program debugging considerably more difficult. Tools for interprocedural program analysis, able to analyze at high levels large FORTRAN programs composed of many subroutines and to perform an automatic high-level parallel decomposition, are being developed at IBM. As an additional possibility, low-level parallelism could also be exploited automatically. This would greatly simplify the program analysis needed in a compiler in order to automatically insert parallel constructs in a program. However, this could only be efficient in an environment in which the cost for scheduling and synchronizing parallel activities is extremely small. Such a “microtasking” environment has been realized, at a prototype level, for IBM multiprocessors and is described in this paper. Its applicability and potential are illustrated with the help of some simple examples. These examples show that, with microtasking, good processor utilization and useful speed-ups are achieved even for fine-grain problems. The user interface of the prototype is described, both at the FORTRAN and at the Assembler level, and the possibility of incorporating this environment into a FORTRAN compiler is discussed.

Note: The Institute of Electrical and Electronics Engineers, Incorporated is distributing this Article with permission of the International Business Machines Corporation (IBM) who is the exclusive owner. The recipient of this Article may not assign, sublicense, lease, rent or otherwise transfer, reproduce, prepare derivative works, publicly display or perform, or distribute the Article.  

Published in:

IBM Journal of Research and Development  (Volume:30 ,  Issue: 6 )