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Submicron-gate-length GaAs MESFETs

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7 Author(s)
Jackson, T.N. ; IBM Research Division, Thomas J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598, USA ; Van Zeghbroeck, B.J. ; Pepper, G. ; DeGelormo, J.F.
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It is well known that reducing gate length is a powerful means to increase the transconductance and transit frequency of GaAs MESFET devices. However, by reducing the gate length without scaling channel doping and thickness, the performance obtained is limited by short-channel effects and parasitics. In this paper we present an overview of our work on two different MESFET structures, illustrating how device performance can be increased by decreasing the gate length, with the result that appropriately scaled MESFETs compare favorably with GaAs-AlGaAs heterojunction FETs. From our work—including some recent results on 0.15-µm-gate-length implantation-self-aligned MESFETs—we conclude that it should be possible to increase the speed of high-speed GaAs MESFET (logic, analog, and microwave) circuits through the use of devices having gate lengths less than 0.5 µm.

Note: The Institute of Electrical and Electronics Engineers, Incorporated is distributing this Article with permission of the International Business Machines Corporation (IBM) who is the exclusive owner. The recipient of this Article may not assign, sublicense, lease, rent or otherwise transfer, reproduce, prepare derivative works, publicly display or perform, or distribute the Article.  

Published in:

IBM Journal of Research and Development  (Volume:34 ,  Issue: 4 )