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2 Author(s)
Hester, Phil D. ; RISC Systed6000 Division, USA ; Filip, Bill

During the four years since the RISC System/6000® (RS/6000) announcement in February of 1990, IBM® has strengthened its product line with microprocessor enhancements, increased memory capacity, improved graphics, greatly expanded I/O adapters, and new AIX® and compiler releases. In 1991, IBM began planning for future RS/6000 systems that would span the range from small, battery-operated products to very large supercomputers and mainframes. As the first step toward achieving this “palmtop to teraFLOPS” goal with a single architecture, IBM investigated further optimizations for the original POWER Architecture™. This effort led to the creation of the PowerPC™ alliance (IBM Corporation, Motorola™, Inc., and Apple® Computer Corporation) and the definition of the PowerPC Architecture™. Today, the single-chip PowerPC 601™ processor is the basis of IBM's entry systems. A more aggressively superscalar version of the original POWER processor, the multichip POWER2™ processor, is exploited in our current IBM high-end RISC systems. As technology continues to advance, PowerPC implementations will provide the basis for high-performance 64-bit super servers.

Note: The Institute of Electrical and Electronics Engineers, Incorporated is distributing this Article with permission of the International Business Machines Corporation (IBM) who is the exclusive owner. The recipient of this Article may not assign, sublicense, lease, rent or otherwise transfer, reproduce, prepare derivative works, publicly display or perform, or distribute the Article.  

Published in:

IBM Journal of Research and Development  (Volume:38 ,  Issue: 5 )