Skip to Main Content
Photoelectrochemical (PEC) etching of III–V semiconductors has been used to fabricate unique structures in electronic and photonic devices, such as integral lenses on light-emitting diodes, gratings on laser structures, and through-wafer via connections in field-effect transistors. The advantages and characteristics of PEC etching are reviewed, and the extension of this processing technique to silicon is addressed. Three-dimensional structures are of great interest in silicon for electronic and micromechanical devices. Silicon is a challenging material to PEC-etch because the oxides formed during etching inhibit the dissolution rate and decrease the spatial resolution. In addition, the long carrier lifetime permits holes to react at unilluminated sites. Nonaqueous solvents provide a processing environment where oxides do not interfere with the spatial resolution and free fluoride is no longer needed in the dissolution of silicon.
Note: The Institute of Electrical and Electronics Engineers, Incorporated is distributing this Article with permission of the International Business Machines Corporation (IBM) who is the exclusive owner. The recipient of this Article may not assign, sublicense, lease, rent or otherwise transfer, reproduce, prepare derivative works, publicly display or perform, or distribute the Article.