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Damascene copper electroplating for chip interconnections

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5 Author(s)
Andricacos, P.C. ; IBM Research Division, Thomas J. Watson Research Center, Yorktown Heights, New York 10598, USA ; Uzoh, C. ; Dukovic, J.O. ; Horkans, J.
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Damascene Cu electroplating for on-chip metallization, which we conceived and developed in the early 1990s, has been central to IBM's Cu chip interconnection technology. We review here the challenges of filling trenches and vias with Cu without creating a void or seam, and the discovery that electrodeposition can be engineered to give filling performance significantly better than that achievable with conformal step coverage. This attribute of superconformal deposition, which we call superfilling, and its relation to plating additives are discussed, and we present a numerical model that represents the shape-change behavior of this system.

Note: The Institute of Electrical and Electronics Engineers, Incorporated is distributing this Article with permission of the International Business Machines Corporation (IBM) who is the exclusive owner. The recipient of this Article may not assign, sublicense, lease, rent or otherwise transfer, reproduce, prepare derivative works, publicly display or perform, or distribute the Article.  

Published in:

IBM Journal of Research and Development  (Volume:42 ,  Issue: 5 )

Date of Publication:

Sep. 1998

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