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Cell Broadband Engine processor: Design and implementation

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3 Author(s)
M. W. Riley ; IBM Systems and Technology Group, 11501 Burnet Road, Austin, Texas 78758, USA ; J. D. Warnock ; D. F. Wendel

The Cell Broadband Engine™ (Cell/B.E.) processor was developed by Sony, Toshiba, and IBM engineers to deliver a high-speed, high-performance, multicore processor that brings supercomputer performance via a custom system-on-a-chip (SoC) implementation. To achieve its goals, the Cell/B.E. processor uses an innovative architecture, new circuit design styles, and hierarchical integration and verification techniques. The Cell/B.E. processor design point was also targeted at high-volume manufacturing. To meet high-volume manufacturing requirements, the chip was designed so that it could be completely tested in less than 26 seconds. In addition to the above items, the Cell/B.E. processor was designed with the “triple design constraints” of maximizing performance while minimizing area and power consumed. The initial application was targeted at real-time systems that require high-speed data movement for both on-chip and off-chip transfers. This application also required very high speed compute and real-time response processes.

Note: The Institute of Electrical and Electronics Engineers, Incorporated is distributing this Article with permission of the International Business Machines Corporation (IBM) who is the exclusive owner. The recipient of this Article may not assign, sublicense, lease, rent or otherwise transfer, reproduce, prepare derivative works, publicly display or perform, or distribute the Article.  

Published in:

IBM Journal of Research and Development  (Volume:51 ,  Issue: 5 )