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Fully-integrated novel high efficiency linear CMOS power amplifier for 5.8 GHz ETC applications

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5 Author(s)
YongJu Suh ; Graduate School of Information, Production and Systems, Waseda University, Wakamatsu-Ku, Kitakyushu-Shi, Japan ; Jiangtao Sun ; Koji Horie ; Nobuyuki Itoh
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A fully integrated novel power amplifier (PA) using 130 nm CMOS process is presented for electric toll collection (ETC) applications. To obtain good efficiency and high linear gain performance, a novel cascode PA based on a class E PA has been designed, fabricated and fully measured. The proposed PA is a single-ended single-stage amplifier at an operating voltage of only 2 V. The power added efficiency (PAE) of the PA is as high as 42.6% with a gain of 11.4 dB at P1 dB of 13.4 dBm. This CMOS PA includes all matching circuits and biasing circuits, and no external components are required.

Published in:

2009 Asia Pacific Microwave Conference

Date of Conference:

7-10 Dec. 2009