Skip to Main Content
The discrete wavelet transform (DWT) is an important operation in applications of digital signal processing. In this paper, we review several traditional DWT implementation approaches, e.g., application-specific integrated circuits, field-programmable gate arrays, digital signal processors, general-purpose processors, and graphic processors, and discuss their limitations in terms of performance and flexibility. In order to provide both high-performance and flexibility, we propose a new approach, namely a parallel architecture exploiting the collaboration of reconfigurable processing elements in grid computing. Grid computing can exploit the task level parallelism to execute the 2D DWT. In addition, reconfigurable computing offers a flexible platform and can be used as hardware accelerators. We mapped the DWT in a grid. Our experimental results show that speedups of up to 4.1x can be achieved.
Date of Conference: 9-11 Dec. 2009