Skip to Main Content
A CMOS RF digitally programmable gain amplifier (RF PGA) is implemented as a part of a low-IF tuner IC using 0.25 and 0.5Â¿m CMOS technology. This is achieved by applying a newly proposed differential circuit (the second derivatives of transconductance) cancellation technique, called the differential multiple gated transistor (DMGTR). In the DMGTR amplifier, linearity is improved by using transconductance linearization which can be achieved by canceling the negative peak value of the main transistor with the positive one in the auxiliary transistor having a different size and gate drive combined in parallel which is properly sized and biased. This enhancement, however, is limited by the distortion originated from the combined influence of and harmonic feedback, which can greatly be reduced by the cascoding MGTR output for the amplifier. By adopting the DMGTR, a low-power highly linear RF PGA is implemented. In this article, we propose a new differential circuit linearity improvement technique, called the differential multiple gated transistor (DMGTR), in order to obtain a low-power highly linear RF PGA. This technique does not lose other performance or consume extra power.